The present invention relates generally to the field of digital storage buffers. In particular, the present invention provides an improved threshold detection logic circuit that determines when a buffer storage threshold has been reached to prevent data overflow.
First-in first-out (FIFO) buffers are commonly used in many digital systems to temporarily receive and store data while various tasks are being performed by the systems processing unit. A FIFO buffer is configured to permit data to be simultaneously written into the top of a memory stack having a plurality of storage locations while data is being read from the bottom of the memory stack. Data overflow can result if the processing unit does not read data from the FIFO prior to the last storage location of the stack being filled with data, which can occur if the processor is performing tasks not allowing data to be read from the FIFO while data is continually being received and stored in the FIFO.
In view of the above, it is necessary to insure that a read operation will be initiated by the processing unit prior to all of the storage locations of the memory stack being filled with data. For example, if a FIFO has a memory stack containing eight storage locations, write operations to the FIFO are being performed at the rate of once per clock cycle, and the processing unit requires three clock cycles to perform a read operation after receiving an interrupt signal, then the interrupt signal must be generated--at the very latest--after a threshold of five excess write operations has been reached (wherein the number of excess write operations performed is equal to the total number of write operations performed less the total number of read operations performed). Otherwise, all available storage locations will be filled prior to the processing unit being able to service the interrupt. The processing unit must also continue to perform read operations as long as the threshold value is exceeded.
The establishment of a programmable threshold level and the monitoring of the same can be accomplished by the use of a threshold pointer. For example, the FIFO may have a read pointer that indicates the storage location in the memory stack of the data word to be read in the next read operation, and a write pointer that indicates the storage location to which the next data word is to be written in the memory stack during the next write operation. A programmable threshold pointer can be provided and an interrupt can be generated when the number of data words written to the FIFO is greater than or equal to the threshold pointer.
Another approach to providing programmable threshold detection is to employ a counter which increments and decrements in response to write and read operations. A register is then provided in which a threshold value is stored. A comparator compares the count value to the threshold value stored in the register and generates an interrupt when the values are equal.
Both of the approaches to providing programmable threshold detection outlined above, however, have their own disadvantages and limitations. The implementation of a threshold pointer requires a shift register of the same length as the FIFO, and time is required to set the threshold pointer to the right position after the user programs the threshold value. The use of the counter and comparator only indicates when the number of excess write operations is equal to the threshold value and not when the threshold value is exceeded.